Field
The following description relates to a vertical bipolar junction transistor device and a manufacturing method thereof. The following description concerns a structure of a vertical bipolar junction transistor that lowers the manufacturing cost and that can raise a current gain by using of a low-cost Bipolar-CMOS (Complementary Metal Oxide Semiconductor)-DMOS (Double Diffused Metal Oxide Semiconductor) (BCD) process.
Description of Related Art
A bipolar junction transistor having a high current gain is widely used in many kinds of analogue circuits such as an amplifier, a comparator, and a bandgap reference circuit. In manufacturing a bipolar junction transistor, it is beneficial to not only raise a current gain but also to reduce the manufacturing cost. In the following description, a method that uses a Bipolar-CMOS-DMOS (BCD) process has also been developed to satisfy these requirements.
The BCD process is a technology configured to incorporate many devices such as, for example, n-channel lateral DMOS (nLDMOS), p-channel lateral double diffused MOS (pLDMOS), Isolated CMOS, n-channel DMOS (nDMOS), p-channel DMOS (pDMOS), Vertical NPN, Lateral PNP, and Schottky diode together, in one semiconductor substrate.
However, using the present BCD process, when adding additional process steps to elevate the current gain of the bipolar junction transistor, the manufacturing cost increases or a satisfactory level of current gain cannot be acquired.